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US Patent 9026961

 

 

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US Patent and Trademark Office Issued a US patent to Terence Chan

US Patent No. 9,026,961

May 5, 2015

US Patent and Trademark Office has issued a US patent 9,026,961 to Terence Chan, CEO and President of Dynetix Design Solutions Inc.

The patent covers advanced race logic synthesis technologies for ESL-based nanometer-scaled integrated circuit designs.  Specifically, race logic in large-scale integrated circuit designs has been overlooked as a serious design issue by most IC designers and verification engineers, and that causes IC products failure on the field and recall. Dynetix is the leader in race logic audit and synthesis technologies, and its products, RaceCheckTM and V2SimTM, make auditing and auto elimination of race logic in customers' IC designs seamless and painless, and aid customers time-to-market, achieve highest product quality and avoid recalls.

According to Terence Chan, the CEO and President of Dynetix Design Solutions, the patent once again proves Dynetix Design Solutions technical leadership in the digital and mixed-signal IC verification market, and validates the unique technologies that have been implemented in the V2SimTM product.

 


For More Information Contact:

Dynetix Design Solutions
3268 Ridgefield Way, Dublin, CA 94568 USA
Tel: 925-833-7851
Internet: info@dynetix.com

 

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